1. Field of the Invention
This invention relates generally to a switched gain circuit for selectively providing gain or attenuation to an analog signal and, more particularly, to a switched gain circuit based on cell mode logic architecture that includes a plurality of conductive paths to selectively provide attenuation or gain to a differential analog signal.
2. Discussion of the Related Art
Historically, communications systems sampled analog signals to provide signal processing in the system. Modern trends generally represent signals in communications systems as time sampled digital data signals. Because of the availability of very high frequency circuits, it has become possible to process digital signals at higher and higher frequencies into the 100""s of MHz. Digital signal processing offers the advantages of flexibility for change, absolute accuracy without the need for calibration of analog components that are subjected to temperature and aging effects, and the ability to perform very complex signal processing at modest costs. Further, digital signal processing offers the possibility of sharing circuit components for multiple tasks, further reducing system hardware and related costs. However, digital circuit components become very expensive at high frequencies. Further, for those digital systems that process both radio frequency (RF) and intermediate frequency (IF) signals, extreme care must be taken to maintain the accuracy of the signal, especially for waveforms employing complex modulation.
Cellular telephone base stations employ many receiver circuits for receiving and processing cellular telephone signals. Each receiver circuit typically employs two channels, a primary channel and a diversity channel, each having a separate antenna, so that the receiver circuit can select which of the two received signals is the strongest for subsequent processing. Some receiver circuits combine the primary channel and diversity channel signals for increased performance. This allows the receiver to be more reliable by lessening the chance that cellular calls are dropped. However, receivers of this type have been limited in their effectiveness for reducing circuit components, reducing the size and cost of IF sampling circuits, and maintaining signal fidelity at high frequencies.
Receiver circuits for cellular base stations employ automatic gain control (AGC) using variable gain amplifiers (VGAs) and multiplexers for amplifying and selecting analog signals propagating through the primary and diversity channels. The analog signals are also applied to an analog-to-digital converter (ADC) to be converted to digital signals for digital processing. One or more ADCs are employed at various locations in the circuit relative to the VGA and multiplexer.
The known Analog Devices AD6600 Diversity Receiver chipset provides independent channel attenuation, multiplexing, signal gain and analog-to-digital conversion on a single chip. In this design, an analog multiplexer is preceded by individual variable gain attenuator stages for each channel and a peak detecting gain control circuit.
U.S. Pat. No. 5,861,831 discloses a clock-to-clock auto-ranging ADC that operates directly on an analog signal in the IF band or higher to track it""s gain range on a clock-to-clock basis to produce a digital signal that maintains high resolution of the analog signal without clipping or loss of signal sensitivity. The ADC samples the analog signal at sufficiently high frequency so that a peak detector can accurately determine the maximum signal level over at least one-half of a signal period, and then reset the signal gain going into the ADC prior to the beginning of the next sample period. The ""831 patent offers improvements for analog-to-digital conversion, but does not address the multiplexing architecture for high frequency. Further, combining all of the functions as is done in the ""831 patent onto a single chip slows the speed of the signal throughput and compromises the isolation between the primary and diversity channels.
National Semiconductor has a diversity receiver chipset of the type being discussed herein that operates at high frequency, but requires several separate chips in various architectures. Further, this chipset does not multiplex the analog signals, but has a separate parallel VGA and ADC path for each primary and diversity channel. This design provides good isolation, but drives up the cost of implementation.
In accordance with the teachings of the present invention, a switched gain circuit is disclosed that employs a plurality of conduction paths that provide different levels of signal gain or attenuation to an analog input signal. The circuit is based on a current mode logic design where the conduction paths are coupled between a voltage line and a current source. Each conduction path includes a plurality of switching devices, such as heterojunction bipolar transistors. Further, each conduction path includes a gain device, such as a degenerative resistor, that provides gain or attenuation to the analog input signal. A separate control signal is applied to a switching device in each conduction path to select a particular conduction path to be coupled to the output.
In one embodiment, the analog input signal is a differential analog input signal having a first part and a second part that are 180xc2x0 out of phase with each other. The first part of the analog signal is coupled to the base terminal of one bipolar transistor in each of the conduction paths, and the second part of the analog signal is coupled to the base terminal of another bipolar transistor in each conduction path.
Additional objects, advantages and features of the present invention will become apparent from the following description and appended claims, taken in conjunction with the accompanying drawings.